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authorTom Stellard <thomas.stellard@amd.com>2014-10-31 20:52:02 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-10-31 20:52:02 +0000
commitaa73831757c93afa414030db56d180e1ec7b8274 (patch)
treed70ebf5b4d36b1123183417100397eb3755585be /llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
parent7779b4fd8ee578a587deb7299c3337cb969276c6 (diff)
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R600: Make sure to inline all internal functions
Function calls aren't supported yet. llvm-svn: 220996
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/R600/AMDGPUTargetMachine.cpp14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
index 1b4fe83..ca4d0ca 100644
--- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp
@@ -80,6 +80,7 @@ public:
return nullptr;
}
+ void addIRPasses() override;
void addCodeGenPrepare() override;
bool addPreISel() override;
bool addInstSelector() override;
@@ -106,6 +107,19 @@ void AMDGPUTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
PM.add(createAMDGPUTargetTransformInfoPass(this));
}
+void AMDGPUPassConfig::addIRPasses() {
+ // Function calls are not supported, so make sure we inline everything.
+ addPass(createAMDGPUAlwaysInlinePass());
+ addPass(createAlwaysInlinerPass());
+ // We need to add the barrier noop pass, otherwise adding the function
+ // inlining pass will cause all of the PassConfigs passes to be run
+ // one function at a time, which means if we have a nodule with two
+ // functions, then we will generate code for the first function
+ // without ever running any passes on the second.
+ addPass(createBarrierNoopPass());
+ TargetPassConfig::addIRPasses();
+}
+
void AMDGPUPassConfig::addCodeGenPrepare() {
const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
if (ST.isPromoteAllocaEnabled()) {