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author | Tom Stellard <thomas.stellard@amd.com> | 2014-11-03 19:49:05 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-11-03 19:49:05 +0000 |
commit | 5cbb53c41ee0d6bb37a15602054bab336b57c5ee (patch) | |
tree | 7b9869cb73ba20d49261df9059fb382fd779e505 /llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | |
parent | e3db7784b685e23ae92c644bdbfa1117e6c9a142 (diff) | |
download | llvm-5cbb53c41ee0d6bb37a15602054bab336b57c5ee.zip llvm-5cbb53c41ee0d6bb37a15602054bab336b57c5ee.tar.gz llvm-5cbb53c41ee0d6bb37a15602054bab336b57c5ee.tar.bz2 |
Reapply: R600: Make sure to inline all internal functions
Function calls aren't supported yet.
This was reverted due to build breakages, which should be fixed now.
llvm-svn: 221173
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp index 1b4fe83..ca4d0ca 100644 --- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -80,6 +80,7 @@ public: return nullptr; } + void addIRPasses() override; void addCodeGenPrepare() override; bool addPreISel() override; bool addInstSelector() override; @@ -106,6 +107,19 @@ void AMDGPUTargetMachine::addAnalysisPasses(PassManagerBase &PM) { PM.add(createAMDGPUTargetTransformInfoPass(this)); } +void AMDGPUPassConfig::addIRPasses() { + // Function calls are not supported, so make sure we inline everything. + addPass(createAMDGPUAlwaysInlinePass()); + addPass(createAlwaysInlinerPass()); + // We need to add the barrier noop pass, otherwise adding the function + // inlining pass will cause all of the PassConfigs passes to be run + // one function at a time, which means if we have a nodule with two + // functions, then we will generate code for the first function + // without ever running any passes on the second. + addPass(createBarrierNoopPass()); + TargetPassConfig::addIRPasses(); +} + void AMDGPUPassConfig::addCodeGenPrepare() { const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>(); if (ST.isPromoteAllocaEnabled()) { |