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author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-06 18:00:21 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-06 18:00:21 +0000 |
commit | 49f8bfdcb71ce973ca847243c84cfea607cfa847 (patch) | |
tree | 4a4270ff96995d309125c7ec51f445f3753aae3e /llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | |
parent | 07f1160a0c20f8a81245ef9db5fa6b828819923b (diff) | |
download | llvm-49f8bfdcb71ce973ca847243c84cfea607cfa847.zip llvm-49f8bfdcb71ce973ca847243c84cfea607cfa847.tar.gz llvm-49f8bfdcb71ce973ca847243c84cfea607cfa847.tar.bz2 |
R600/SI: Add a stub GCNTargetMachine
This is equivalent to the AMDGPUTargetMachine now, but it is the
starting point for separating R600 and GCN functionality into separate
targets.
It is recommened that users start using the gcn triple for GCN-based
GPUs, because using the r600 triple for these GPUs will be deprecated in
the future.
llvm-svn: 225277
Diffstat (limited to 'llvm/lib/Target/R600/AMDGPUTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/R600/AMDGPUTargetMachine.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp index 0ff7cf1..2a6fbf23 100644 --- a/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -39,6 +39,7 @@ using namespace llvm; extern "C" void LLVMInitializeR600Target() { // Register the target RegisterTargetMachine<AMDGPUTargetMachine> X(TheAMDGPUTarget); + RegisterTargetMachine<GCNTargetMachine> Y(TheGCNTarget); } static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) { @@ -218,3 +219,13 @@ void AMDGPUPassConfig::addPreEmitPass() { addPass(createSILowerControlFlowPass(*TM), false); } } + + +//===----------------------------------------------------------------------===// +// GCN Target Machine (SI+) +//===----------------------------------------------------------------------===// + +GCNTargetMachine::GCNTargetMachine(const Target &T, StringRef TT, StringRef FS, + StringRef CPU, TargetOptions Options, Reloc::Model RM, + CodeModel::Model CM, CodeGenOpt::Level OL) : + AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) { } |