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author | Hal Finkel <hfinkel@anl.gov> | 2014-11-21 04:35:51 +0000 |
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committer | Hal Finkel <hfinkel@anl.gov> | 2014-11-21 04:35:51 +0000 |
commit | f413be11f0df6374d4091114ec81a758a14b4f18 (patch) | |
tree | 6f2ac1774daf8bcbc6caae6e9e0719c63c41c56f /llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | |
parent | 3630c399727acf2936ea14cb2d51e8b1e747bfbd (diff) | |
download | llvm-f413be11f0df6374d4091114ec81a758a14b4f18.zip llvm-f413be11f0df6374d4091114ec81a758a14b4f18.tar.gz llvm-f413be11f0df6374d4091114ec81a758a14b4f18.tar.bz2 |
[PPC] Use SeparateConstOffsetFromGEP
This mirrors r222331, which enabled SeparateConstOffsetFromGEP on AArch64, in
the PowerPC backend. Yields, on a POWER7 machine, a 30% speedup on
SingleSource/Benchmarks/Shootout/nestedloop (this might just be from LICM,
there is a store moved out of the inner loop) and a potential speedup on
MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/mpeg2decode. Regardless, it
makes some code look cleaner, and synchronizing the backends in this regard
seems like a generally good thing.
llvm-svn: 222504
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index f15189c..e930a9c 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -22,6 +22,7 @@ #include "llvm/Support/FormattedStream.h" #include "llvm/Support/TargetRegistry.h" #include "llvm/Target/TargetOptions.h" +#include "llvm/Transforms/Scalar.h" using namespace llvm; static cl:: @@ -32,6 +33,11 @@ static cl::opt<bool> VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early", cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early")); +static cl::opt<bool> +EnableGEPOpt("ppc-gep-opt", cl::Hidden, + cl::desc("Enable optimizations on complex GEPs"), + cl::init(true)); + extern "C" void LLVMInitializePowerPCTarget() { // Register the targets RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target); @@ -168,6 +174,20 @@ TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) { void PPCPassConfig::addIRPasses() { addPass(createAtomicExpandPass(&getPPCTargetMachine())); + + if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) { + // Call SeparateConstOffsetFromGEP pass to extract constants within indices + // and lower a GEP with multiple indices to either arithmetic operations or + // multiple GEPs with single index. + addPass(createSeparateConstOffsetFromGEPPass(TM, true)); + // Call EarlyCSE pass to find and remove subexpressions in the lowered + // result. + addPass(createEarlyCSEPass()); + // Do loop invariant code motion in case part of the lowered result is + // invariant. + addPass(createLICMPass()); + } + TargetPassConfig::addIRPasses(); } |