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author | Zaara Syeda <syzaara@ca.ibm.com> | 2018-03-19 14:52:25 +0000 |
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committer | Zaara Syeda <syzaara@ca.ibm.com> | 2018-03-19 14:52:25 +0000 |
commit | ff05e2b0e609a10ac7ab1db445ffdba24319d50d (patch) | |
tree | aa43bbdf11411c98ab7670b00081e4db4dad32c6 /llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | |
parent | 30c38c38497763d5660fde146e1185c0dbb082d5 (diff) | |
download | llvm-ff05e2b0e609a10ac7ab1db445ffdba24319d50d.zip llvm-ff05e2b0e609a10ac7ab1db445ffdba24319d50d.tar.gz llvm-ff05e2b0e609a10ac7ab1db445ffdba24319d50d.tar.bz2 |
[MachineLICM] Add functions to MachineLICM to hoist invariant stores
This patch adds functions to allow MachineLICM to hoist invariant stores.
Currently, MachineLICM does not hoist any store instructions, however
when storing the same value to a constant spot on the stack, the store
instruction should be considered invariant and be hoisted. The function
isInvariantStore iterates each operand of the store instruction and checks
that each register operand satisfies isCallerPreservedPhysReg. The store
may be fed by a copy, which is hoisted by isCopyFeedingInvariantStore.
This patch also adds the PowerPC changes needed to consider the stack
register as caller preserved.
Differential Revision: https://reviews.llvm.org/D40196
llvm-svn: 327856
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCInstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 25 |
1 files changed, 2 insertions, 23 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 4e0dd9d..8e92316 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -2178,28 +2178,6 @@ bool PPCInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { return false; } -unsigned PPCInstrInfo::lookThruCopyLike(unsigned SrcReg, - const MachineRegisterInfo *MRI) { - while (true) { - MachineInstr *MI = MRI->getVRegDef(SrcReg); - if (!MI->isCopyLike()) - return SrcReg; - - unsigned CopySrcReg; - if (MI->isCopy()) - CopySrcReg = MI->getOperand(1).getReg(); - else { - assert(MI->isSubregToReg() && "Bad opcode for lookThruCopyLike"); - CopySrcReg = MI->getOperand(2).getReg(); - } - - if (!TargetRegisterInfo::isVirtualRegister(CopySrcReg)) - return CopySrcReg; - - SrcReg = CopySrcReg; - } -} - // Essentially a compile-time implementation of a compare->isel sequence. // It takes two constants to compare, along with the true/false registers // and the comparison type (as a subreg to a CR field) and returns one @@ -2265,6 +2243,7 @@ MachineInstr *PPCInstrInfo::getConstantDefMI(MachineInstr &MI, ConstOp = ~0U; MachineInstr *DefMI = nullptr; MachineRegisterInfo *MRI = &MI.getParent()->getParent()->getRegInfo(); + const TargetRegisterInfo *TRI = &getRegisterInfo(); // If we'ere in SSA, get the defs through the MRI. Otherwise, only look // within the basic block to see if the register is defined using an LI/LI8. if (MRI->isSSA()) { @@ -2274,7 +2253,7 @@ MachineInstr *PPCInstrInfo::getConstantDefMI(MachineInstr &MI, unsigned Reg = MI.getOperand(i).getReg(); if (!TargetRegisterInfo::isVirtualRegister(Reg)) continue; - unsigned TrueReg = lookThruCopyLike(Reg, MRI); + unsigned TrueReg = TRI->lookThruCopyLike(Reg, MRI); if (TargetRegisterInfo::isVirtualRegister(TrueReg)) { DefMI = MRI->getVRegDef(TrueReg); if (DefMI->getOpcode() == PPC::LI || DefMI->getOpcode() == PPC::LI8) { |