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authorChuang-Yu Cheng <cycheng@multicorewareinc.com>2016-04-27 02:59:28 +0000
committerChuang-Yu Cheng <cycheng@multicorewareinc.com>2016-04-27 02:59:28 +0000
commit8676c3d599b6eab7797c2864be511ecaf6b25d8f (patch)
tree5090fe10d46ec896f383d3470a394e918c8ccf2d /llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
parent144debcc0f592f373be11bc865967d321ea2ebd6 (diff)
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[ppc64] fix bug in prologue that mfocrf's cr operand should be explict state instead of implicit
This fixes PR27414 Reviewers: kbarton mgrang tjablin http://reviews.llvm.org/D19255 llvm-svn: 267660
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCFrameLowering.cpp')
-rw-r--r--llvm/lib/Target/PowerPC/PPCFrameLowering.cpp14
1 files changed, 10 insertions, 4 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
index 40a2e8b..3954ee7 100644
--- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
@@ -843,12 +843,15 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
// mfocrf to selectively save just those fields, because mfocrf has short
// latency compares to mfcr.
unsigned MfcrOpcode = PPC::MFCR8;
- if (isELFv2ABI && MustSaveCRs.size() == 1)
+ unsigned CrState = RegState::ImplicitKill;
+ if (isELFv2ABI && MustSaveCRs.size() == 1) {
MfcrOpcode = PPC::MFOCRF8;
+ CrState = RegState::Kill;
+ }
MachineInstrBuilder MIB =
BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg);
for (unsigned i = 0, e = MustSaveCRs.size(); i != e; ++i)
- MIB.addReg(MustSaveCRs[i], RegState::ImplicitKill);
+ MIB.addReg(MustSaveCRs[i], CrState);
BuildMI(MBB, MBBI, dl, TII.get(PPC::STW8))
.addReg(TempReg, getKillRegState(true))
.addImm(8)
@@ -865,12 +868,15 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
// mfocrf to selectively save just those fields, because mfocrf has short
// latency compares to mfcr.
unsigned MfcrOpcode = PPC::MFCR8;
- if (isELFv2ABI && MustSaveCRs.size() == 1)
+ unsigned CrState = RegState::ImplicitKill;
+ if (isELFv2ABI && MustSaveCRs.size() == 1) {
MfcrOpcode = PPC::MFOCRF8;
+ CrState = RegState::Kill;
+ }
MachineInstrBuilder MIB =
BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg);
for (unsigned i = 0, e = MustSaveCRs.size(); i != e; ++i)
- MIB.addReg(MustSaveCRs[i], RegState::ImplicitKill);
+ MIB.addReg(MustSaveCRs[i], CrState);
}
if (HasFP)