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| author | Jinsong Ji <jji@us.ibm.com> | 2019-06-10 19:04:14 +0000 |
|---|---|---|
| committer | Jinsong Ji <jji@us.ibm.com> | 2019-06-10 19:04:14 +0000 |
| commit | 9c7f93e9146af3222120f21847fbe88e2ecd68ca (patch) | |
| tree | 7f642c37d4ff398896d51ee0653b3e9b54d8e847 /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
| parent | f8f9d65f85b66d843b4b4c6bb9aeb0ec1f19cbc3 (diff) | |
| download | llvm-9c7f93e9146af3222120f21847fbe88e2ecd68ca.zip llvm-9c7f93e9146af3222120f21847fbe88e2ecd68ca.tar.gz llvm-9c7f93e9146af3222120f21847fbe88e2ecd68ca.tar.bz2 | |
[PowerPC][HTM]Fix $zero is not a GPRC register for builtin_ttest
This was found during HTM cleanup.
Adding a test for builtin_ttest would expose following issue.
*** Bad machine code: Illegal physical register for instruction ***
- function: test10
- basic block: %bb.0 entry (0xf0e57497b58)
- instruction: %5:crrc0 = TABORTWCI 0, $zero, 0
- operand 2: $zero
$zero is not a GPRC register.
LLVM ERROR: Found 1 machine code errors.
Differential Revision: https://reviews.llvm.org/D63079
llvm-svn: 362974
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions