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author | Piotr Sobczak <piotr.sobczak@amd.com> | 2019-06-10 15:58:51 +0000 |
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committer | Piotr Sobczak <piotr.sobczak@amd.com> | 2019-06-10 15:58:51 +0000 |
commit | 9b11e93d900aadfd05614bf3dc43196caf0ef1aa (patch) | |
tree | ff5228c157b8a34a6ba776cddcf3852af64f5cbe /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
parent | 67065c5c70554c8c64286c6538181d1e5413b32d (diff) | |
download | llvm-9b11e93d900aadfd05614bf3dc43196caf0ef1aa.zip llvm-9b11e93d900aadfd05614bf3dc43196caf0ef1aa.tar.gz llvm-9b11e93d900aadfd05614bf3dc43196caf0ef1aa.tar.bz2 |
[AMDGPU] Optimize image_[load|store]_mip
Summary:
Replace image_load_mip/image_store_mip
with image_load/image_store if lod is 0.
Reviewers: arsenm, nhaehnle
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63073
llvm-svn: 362957
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions