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| author | Ahsan Saghir <saghir@ca.ibm.com> | 2020-09-29 09:40:38 -0500 |
|---|---|---|
| committer | Ahsan Saghir <saghir@ca.ibm.com> | 2020-09-30 18:06:49 -0500 |
| commit | 66d2e3f495948412602db4507359b4612639e523 (patch) | |
| tree | bb95feab3f051b98188f77c01b2fb3faef165943 /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
| parent | 21cf2e6c263d7a50654653bce4e83ab463fae580 (diff) | |
| download | llvm-66d2e3f495948412602db4507359b4612639e523.zip llvm-66d2e3f495948412602db4507359b4612639e523.tar.gz llvm-66d2e3f495948412602db4507359b4612639e523.tar.bz2 | |
[PowerPC] Add outer product instructions for MMA
This patch adds outer product instructions for MMA, including related infrastructure, and their tests.
Depends on D84968.
Reviewed By: #powerpc, bsaleil, amyk
Differential Revision: https://reviews.llvm.org/D88043
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp index 38e0541..cc9ffc9 100644 --- a/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp +++ b/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp @@ -212,6 +212,15 @@ static DecodeStatus decodeImmZeroOperand(MCInst &Inst, uint64_t Imm, return MCDisassembler::Success; } +static DecodeStatus decodeVSRpEvenOperands(MCInst &Inst, uint64_t RegNo, + uint64_t Address, + const void *Decoder) { + if (RegNo & 1) + return MCDisassembler::Fail; + Inst.addOperand(MCOperand::createReg(VSRpRegs[RegNo >> 1])); + return MCDisassembler::Success; +} + static DecodeStatus decodeMemRIOperands(MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder) { // Decode the memri field (imm, reg), which has the low 16-bits as the |