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| author | Jay Foad <jay.foad@amd.com> | 2019-10-30 12:18:51 +0000 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2020-01-28 10:52:17 +0000 |
| commit | 4a331beadc3aaeb24a88853d2703f4ac7d513df1 (patch) | |
| tree | 4799a8a73093a1f18ee60a2566ffd44ef1a38159 /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
| parent | 00efeae34f22e81ccbcf8cf9b46f314d8101063b (diff) | |
| download | llvm-4a331beadc3aaeb24a88853d2703f4ac7d513df1.zip llvm-4a331beadc3aaeb24a88853d2703f4ac7d513df1.tar.gz llvm-4a331beadc3aaeb24a88853d2703f4ac7d513df1.tar.bz2 | |
[AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi
Summary:
Up to gfx9, writes to vcc_lo and vcc_hi by instructions like
v_readlane and v_readfirstlane do not update vccz to reflect the new
value of vcc. Fix it by reusing part of the existing vccz bug handling
code, which inserts an "s_mov_b64 vcc, vcc" instruction to restore vccz
just before an instruction that needs the correct value.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69661
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions