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| author | Christopher Bate <cbate@nvidia.com> | 2022-03-25 17:20:07 +0000 |
|---|---|---|
| committer | Thomas Raoux <thomasraoux@google.com> | 2022-03-25 17:28:05 +0000 |
| commit | 3be7c2891798025e524fce1b7cdaa27aee6c9816 (patch) | |
| tree | 3ee7112134f3daf68bb08ea8e37c305ec3f0d631 /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
| parent | 5bc9ee1b780656c6d7f27c4ca657c5a7815311c1 (diff) | |
| download | llvm-3be7c2891798025e524fce1b7cdaa27aee6c9816.zip llvm-3be7c2891798025e524fce1b7cdaa27aee6c9816.tar.gz llvm-3be7c2891798025e524fce1b7cdaa27aee6c9816.tar.bz2 | |
[mlir][NVVM] Add support for nvvm mma.sync ops
This patch adds MLIR NVVM support for the various NVPTX `mma.sync`
operations. There are a number of possible data type, shape,
and other attribute combinations supported by the operation, so a
custom assebmly format is added and attributes are inferred where
possible.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D122410
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions