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| author | Sanjay Patel <spatel@rotateright.com> | 2015-03-25 17:36:01 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-03-25 17:36:01 +0000 |
| commit | 2f8f019daf0fc3cee5df09988d7a9121bdcbf4c9 (patch) | |
| tree | 542afeaa46c2a24585d3ffc376af88013be977b7 /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
| parent | defd9b9b4c69410f84bd311286845b86508d556b (diff) | |
| download | llvm-2f8f019daf0fc3cee5df09988d7a9121bdcbf4c9.zip llvm-2f8f019daf0fc3cee5df09988d7a9121bdcbf4c9.tar.gz llvm-2f8f019daf0fc3cee5df09988d7a9121bdcbf4c9.tar.bz2 | |
[X86, AVX] improve insertion into zero element of 256-bit vector
This patch allows AVX blend instructions to handle insertion into the low
element of a 256-bit vector for the appropriate data types.
For f32, instead of:
vblendps $1, %xmm1, %xmm0, %xmm1 ## xmm1 = xmm1[0],xmm0[1,2,3]
vblendps $15, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0,1,2,3],ymm0[4,5,6,7]
we get:
vblendps $1, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7]
For f64, instead of:
vmovsd %xmm1, %xmm0, %xmm1 ## xmm1 = xmm1[0],xmm0[1]
vblendpd $3, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0,1],ymm0[2,3]
we get:
vblendpd $1, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm1[0],ymm0[1,2,3]
For the hardware-neglected integer data types, I left a TODO comment in the
code and added regression tests for a follow-on patch.
Differential Revision: http://reviews.llvm.org/D8609
llvm-svn: 233199
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions