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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2016-09-13 08:08:06 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2016-09-13 08:08:06 +0000 |
| commit | 05453991fecf42341312212d2c5c3f34f7f3f039 (patch) | |
| tree | 9a85783b3b669a1787b5694c698690ef62d217e3 /llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp | |
| parent | b79f4d3970621b16a28202afb7c2e3c50256995d (diff) | |
| download | llvm-05453991fecf42341312212d2c5c3f34f7f3f039.zip llvm-05453991fecf42341312212d2c5c3f34f7f3f039.tar.gz llvm-05453991fecf42341312212d2c5c3f34f7f3f039.tar.bz2 | |
This adds a new field isAdd to MCInstrDesc. The ARM and Hexagon instruction
descriptions now tag add instructions, and the Hexagon backend is using this to
identify loop induction statements.
Patch by Sam Parker and Sjoerd Meijer.
Differential Revision: https://reviews.llvm.org/D23601
llvm-svn: 281304
Diffstat (limited to 'llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions