diff options
| author | Krzysztof Parzyszek <kparzysz@quicinc.com> | 2022-12-03 11:06:12 -0600 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@quicinc.com> | 2022-12-03 12:08:47 -0600 |
| commit | 8c7c20f033c7036a8bf231ca6f9e02172cb581f0 (patch) | |
| tree | 5980d2a7545070fb3c37df39dbb563b98158a778 /llvm/lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | d98c17271265f54a5c6ad07b2094f9b5bf3a34cc (diff) | |
| download | llvm-8c7c20f033c7036a8bf231ca6f9e02172cb581f0.zip llvm-8c7c20f033c7036a8bf231ca6f9e02172cb581f0.tar.gz llvm-8c7c20f033c7036a8bf231ca6f9e02172cb581f0.tar.bz2 | |
Convert Optional<CodeModel> to std::optional<CodeModel>
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index fa97051..a2fd27e 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -41,6 +41,7 @@ #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetOptions.h" +#include <optional> #include <string> using namespace llvm; @@ -120,7 +121,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, @@ -149,7 +150,7 @@ MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} @@ -159,7 +160,7 @@ MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, + std::optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} |