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authorEric Christopher <echristo@gmail.com>2014-07-18 23:41:32 +0000
committerEric Christopher <echristo@gmail.com>2014-07-18 23:41:32 +0000
commit4e7d1e7e7bb36bcd715297b36d688bdc0ed96bdf (patch)
treea7c30c18e955d430a9e192d803dd196d06e7be18 /llvm/lib/Target/Mips/MipsTargetMachine.cpp
parente54f10ee77cc973ae83a425efdb7494a111683ab (diff)
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Fundamentally change the MipsSubtarget replacement machinery:
a) Move the replacement level decision to the target machine. b) Create additional subtargets at the TargetMachine level to cache and make replacement easy. c) Make the mips16 features obvious. d) Remove the override logic as it no longer does anything. e) Have MipsModuleDAGToDAGISel take only the target machine. f) Have the constant islands pass grab the current subtarget from the MachineFunction (via the TargetMachine) instead of caching it. g) Unconditionally initialize TLOF. h) Remove the old complicated subtarget based resetting and replace it with simple conditionals. llvm-svn: 213430
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsTargetMachine.cpp26
1 files changed, 24 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 3f2a055..bb1870e 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -56,7 +56,12 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, StringRef TT,
Reloc::Model RM, CodeModel::Model CM,
CodeGenOpt::Level OL, bool isLittle)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
- Subtarget(TT, CPU, FS, isLittle, this) {
+ Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, this),
+ NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
+ isLittle, this),
+ Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",
+ isLittle, this) {
+ Subtarget = &DefaultSubtarget;
initAsmInfo();
}
@@ -78,6 +83,23 @@ MipselTargetMachine(const Target &T, StringRef TT,
CodeGenOpt::Level OL)
: MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
+void MipsTargetMachine::resetSubtarget(MachineFunction *MF) {
+ DEBUG(dbgs() << "resetSubtarget\n");
+ AttributeSet FnAttrs = MF->getFunction()->getAttributes();
+ bool Mips16Attr = FnAttrs.hasAttribute(AttributeSet::FunctionIndex, "mips16");
+ bool NoMips16Attr =
+ FnAttrs.hasAttribute(AttributeSet::FunctionIndex, "nomips16");
+ assert(!(Mips16Attr && NoMips16Attr) &&
+ "mips16 and nomips16 specified on the same function");
+ if (Mips16Attr)
+ Subtarget = &Mips16Subtarget;
+ else if (NoMips16Attr)
+ Subtarget = &NoMips16Subtarget;
+ else
+ Subtarget = &DefaultSubtarget;
+ return;
+}
+
namespace {
/// Mips Code Generator Pass Configuration Options.
class MipsPassConfig : public TargetPassConfig {
@@ -145,7 +167,7 @@ bool MipsPassConfig::addPreRegAlloc() {
}
void MipsTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
- if (Subtarget.allowMixed16_32()) {
+ if (Subtarget->allowMixed16_32()) {
DEBUG(errs() << "No ");
//FIXME: The Basic Target Transform Info
// pass needs to become a function pass instead of