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| author | Arthur Eubanks <aeubanks@google.com> | 2023-09-14 14:10:14 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-09-14 14:10:14 -0700 |
| commit | 0a1aa6cda2758b0926a95f87d39ffefb1cb90200 (patch) | |
| tree | 766dc35b70235864f287a9f0a2cef45d487203ad /llvm/lib/Target/Mips/MipsTargetMachine.cpp | |
| parent | ae84b160d2fe61a7211817262ce717a17d27c0ae (diff) | |
| download | llvm-0a1aa6cda2758b0926a95f87d39ffefb1cb90200.zip llvm-0a1aa6cda2758b0926a95f87d39ffefb1cb90200.tar.gz llvm-0a1aa6cda2758b0926a95f87d39ffefb1cb90200.tar.bz2 | |
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.
This matches other nearby enums.
For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::
Diffstat (limited to 'llvm/lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsTargetMachine.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index fe31ab9..0742228 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -123,7 +123,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT, + CodeGenOptLevel OL, bool JIT, bool isLittle) : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, CPU, FS, Options, getEffectiveRelocModel(JIT, RM), @@ -152,7 +152,7 @@ MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT) + CodeGenOptLevel OL, bool JIT) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} void MipselTargetMachine::anchor() {} @@ -162,7 +162,7 @@ MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT) + CodeGenOptLevel OL, bool JIT) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} const MipsSubtarget * @@ -347,7 +347,7 @@ bool MipsPassConfig::addLegalizeMachineIR() { } void MipsPassConfig::addPreRegBankSelect() { - bool IsOptNone = getOptLevel() == CodeGenOpt::None; + bool IsOptNone = getOptLevel() == CodeGenOptLevel::None; addPass(createMipsPostLegalizeCombiner(IsOptNone)); } |