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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
| commit | c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23 (patch) | |
| tree | 94dc79d894cf6e87f33787cba82f5a731a3a96be /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | a7b142603da5ae63232b727bb20b997cadbaf4bb (diff) | |
| download | llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.zip llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.tar.gz llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.tar.bz2 | |
Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).
llvm-svn: 237245
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index c3f391a..f9d0029 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -36,16 +36,16 @@ class MipsDisassembler : public MCDisassembler { public: MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool IsBigEndian) : MCDisassembler(STI, Ctx), - IsMicroMips(STI.getFeatureBits()[Mips::FeatureMicroMips]), + IsMicroMips(STI.getFeatureBits() & Mips::FeatureMicroMips), IsBigEndian(IsBigEndian) {} - bool hasMips3() const { return STI.getFeatureBits()[Mips::FeatureMips3]; } - bool hasMips32() const { return STI.getFeatureBits()[Mips::FeatureMips32]; } + bool hasMips3() const { return STI.getFeatureBits() & Mips::FeatureMips3; } + bool hasMips32() const { return STI.getFeatureBits() & Mips::FeatureMips32; } bool hasMips32r6() const { - return STI.getFeatureBits()[Mips::FeatureMips32r6]; + return STI.getFeatureBits() & Mips::FeatureMips32r6; } - bool isGP64() const { return STI.getFeatureBits()[Mips::FeatureGP64Bit]; } + bool isGP64() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; } bool hasCOP3() const { // Only present in MIPS-I and MIPS-II |