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| author | Aleksandar Beserminji <Aleksandar.Beserminji@mips.com> | 2018-01-08 16:50:33 +0000 |
|---|---|---|
| committer | Aleksandar Beserminji <Aleksandar.Beserminji@mips.com> | 2018-01-08 16:50:33 +0000 |
| commit | a734d409c6fda2b9a0b53304867ce95f99987da4 (patch) | |
| tree | e7f060e1c4f77e67468be70f03ce7ab9793ba91c /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | 9a60d2c15799ee1ee33f67f3e7ffa189aa928342 (diff) | |
| download | llvm-a734d409c6fda2b9a0b53304867ce95f99987da4.zip llvm-a734d409c6fda2b9a0b53304867ce95f99987da4.tar.gz llvm-a734d409c6fda2b9a0b53304867ce95f99987da4.tar.bz2 | |
[mips] Remove duplicated R6 EVA instructions
This patch removes duplicated EVA instructions in R6.
Differential Revision: https://reviews.llvm.org/D41769
llvm-svn: 322007
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index ef0f08b..3d29a0d 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -277,11 +277,6 @@ static DecodeStatus DecodeMemEVA(MCInst &Inst, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeLoadByte9(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -300,11 +295,6 @@ static DecodeStatus DecodeCacheOpMM(MCInst &Inst, uint64_t Address, const void *Decoder); -static DecodeStatus DecodeStoreEvaOpMM(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder); - static DecodeStatus DecodePrefeOpMM(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1538,24 +1528,6 @@ static DecodeStatus DecodeMemEVA(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeLoadByte9(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { - int Offset = SignExtend32<9>(Insn & 0x1ff); - unsigned Base = fieldFromInstruction(Insn, 16, 5); - unsigned Reg = fieldFromInstruction(Insn, 21, 5); - - Base = getReg(Decoder, Mips::GPR32RegClassID, Base); - Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); - - Inst.addOperand(MCOperand::createReg(Reg)); - Inst.addOperand(MCOperand::createReg(Base)); - Inst.addOperand(MCOperand::createImm(Offset)); - - return MCDisassembler::Success; -} - static DecodeStatus DecodeLoadByte15(MCInst &Inst, unsigned Insn, uint64_t Address, @@ -1642,24 +1614,6 @@ static DecodeStatus DecodeCacheeOp_CacheOpR6(MCInst &Inst, return MCDisassembler::Success; } -static DecodeStatus DecodeStoreEvaOpMM(MCInst &Inst, - unsigned Insn, - uint64_t Address, - const void *Decoder) { - int Offset = SignExtend32<9>(Insn & 0x1ff); - unsigned Reg = fieldFromInstruction(Insn, 21, 5); - unsigned Base = fieldFromInstruction(Insn, 16, 5); - - Reg = getReg(Decoder, Mips::GPR32RegClassID, Reg); - Base = getReg(Decoder, Mips::GPR32RegClassID, Base); - - Inst.addOperand(MCOperand::createReg(Reg)); - Inst.addOperand(MCOperand::createReg(Base)); - Inst.addOperand(MCOperand::createImm(Offset)); - - return MCDisassembler::Success; -} - static DecodeStatus DecodeSyncI(MCInst &Inst, unsigned Insn, uint64_t Address, |