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| author | Jozef Kolek <jozef.kolek@imgtec.com> | 2015-01-21 12:10:11 +0000 |
|---|---|---|
| committer | Jozef Kolek <jozef.kolek@imgtec.com> | 2015-01-21 12:10:11 +0000 |
| commit | 2c6d73207ec948ed62433818e6ce197ca571c795 (patch) | |
| tree | 0b411da3572fc30bba84b848717e1e6a518e4ccf /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | df5747a9004e5b5b79f3c44ba5e1e37503e7ad86 (diff) | |
| download | llvm-2c6d73207ec948ed62433818e6ce197ca571c795.zip llvm-2c6d73207ec948ed62433818e6ce197ca571c795.tar.gz llvm-2c6d73207ec948ed62433818e6ce197ca571c795.tar.bz2 | |
[mips][microMIPS] Implement ADDIUPC instruction
Differential Revision: http://reviews.llvm.org/D6582
llvm-svn: 226656
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index 98fc1eb..501e066 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -370,6 +370,9 @@ static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn, static DecodeStatus DecodeUImm5lsl2(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, + uint64_t Address, const void *Decoder); + /// INSVE_[BHWD] have an implicit operand that the generated decoder doesn't /// handle. template <typename InsnType> @@ -1756,3 +1759,9 @@ static DecodeStatus DecodeRegListOperand16(MCInst &Inst, unsigned Insn, return MCDisassembler::Success; } + +static DecodeStatus DecodeSimm23Lsl2(MCInst &Inst, unsigned Insn, + uint64_t Address, const void *Decoder) { + Inst.addOperand(MCOperand::CreateImm(SignExtend32<23>(Insn) << 2)); + return MCDisassembler::Success; +} |