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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-03-24 12:56:59 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-03-24 12:56:59 +0000 |
| commit | 29704e7fb425a9cdf0e134996be3c0302a71feed (patch) | |
| tree | d198e67a086ed876f28bdbfd6f6156f8da2032f3 /llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | |
| parent | d5cc45f192cbc1d6ad2566cbf999e1edfb3a525a (diff) | |
| download | llvm-29704e7fb425a9cdf0e134996be3c0302a71feed.zip llvm-29704e7fb425a9cdf0e134996be3c0302a71feed.tar.gz llvm-29704e7fb425a9cdf0e134996be3c0302a71feed.tar.bz2 | |
Revert "Use std::bitset for SubtargetFeatures"
This reverts commit r233055.
It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time.
llvm-svn: 233068
Diffstat (limited to 'llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp index c69a60b..8849366 100644 --- a/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp +++ b/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp @@ -36,16 +36,16 @@ class MipsDisassembler : public MCDisassembler { public: MipsDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, bool IsBigEndian) : MCDisassembler(STI, Ctx), - IsMicroMips(STI.getFeatureBits()[Mips::FeatureMicroMips]), + IsMicroMips(STI.getFeatureBits() & Mips::FeatureMicroMips), IsBigEndian(IsBigEndian) {} - bool hasMips3() const { return STI.getFeatureBits()[Mips::FeatureMips3]; } - bool hasMips32() const { return STI.getFeatureBits()[Mips::FeatureMips32]; } + bool hasMips3() const { return STI.getFeatureBits() & Mips::FeatureMips3; } + bool hasMips32() const { return STI.getFeatureBits() & Mips::FeatureMips32; } bool hasMips32r6() const { - return STI.getFeatureBits()[Mips::FeatureMips32r6]; + return STI.getFeatureBits() & Mips::FeatureMips32r6; } - bool isGP64() const { return STI.getFeatureBits()[Mips::FeatureGP64Bit]; } + bool isGP64() const { return STI.getFeatureBits() & Mips::FeatureGP64Bit; } bool hasCOP3() const { // Only present in MIPS-I and MIPS-II |