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| author | Piyou Chen <piyou.chen@sifive.com> | 2025-10-14 15:57:35 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-10-14 15:57:35 +0800 |
| commit | fa57074d146925a303263905af415cc78f58f353 (patch) | |
| tree | 4794e10ac03f481996b1cc5a2c1503357253882d /llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp | |
| parent | aa731e190457eb0509548e255d69db4376209365 (diff) | |
| download | llvm-fa57074d146925a303263905af415cc78f58f353.zip llvm-fa57074d146925a303263905af415cc78f58f353.tar.gz llvm-fa57074d146925a303263905af415cc78f58f353.tar.bz2 | |
[clang][RISCV] support BITINT with mixed-type (#156592)
Implement https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/419.
This patch makes the type extension based on the variable type for
BIGINT, rather than using sign extension for all cases.
Diffstat (limited to 'llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions