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author | Mihai Popa <mihail.popa@gmail.com> | 2013-05-20 14:57:05 +0000 |
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committer | Mihai Popa <mihail.popa@gmail.com> | 2013-05-20 14:57:05 +0000 |
commit | f41e3f56a5b337ac78816c7555add946eed725ca (patch) | |
tree | e1b2a87f39a9a0e561335a538bae204fa268d4a6 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | 3cb56a4f34cf73b36e5052b7ce6c9adc97008d27 (diff) | |
download | llvm-f41e3f56a5b337ac78816c7555add946eed725ca.zip llvm-f41e3f56a5b337ac78816c7555add946eed725ca.tar.gz llvm-f41e3f56a5b337ac78816c7555add946eed725ca.tar.bz2 |
VSTn instructions have a number of encoding constraints which are not implemented. I have added these using wrapper methods around the original custom decoder (incidentally - this is a huge poorly written method that should be cleaned up. I have left it as is since the changes would be much to hard to review).
llvm-svn: 182281
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index aa59c982..fb82945 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -241,6 +241,14 @@ static DecodeStatus DecodeAddrMode6Operand(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); +static DecodeStatus DecodeVST1Instruction(MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); +static DecodeStatus DecodeVST2Instruction(MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); +static DecodeStatus DecodeVST3Instruction(MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); +static DecodeStatus DecodeVST4Instruction(MCInst &Inst, unsigned Val, + uint64_t Address, const void *Decoder); static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder); static DecodeStatus DecodeVLD1DupInstruction(MCInst &Inst, unsigned Val, @@ -2450,6 +2458,49 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, return S; } +static DecodeStatus DecodeVST1Instruction(MCInst& Inst, unsigned Insn, + uint64_t Addr, const void* Decoder) { + unsigned type = fieldFromInstruction(Insn, 8, 4); + unsigned align = fieldFromInstruction(Insn, 4, 2); + if(type == 7 && (align & 2)) return MCDisassembler::Fail; + if(type == 10 && align == 3) return MCDisassembler::Fail; + if(type == 6 && (align & 2)) return MCDisassembler::Fail; + + return DecodeVSTInstruction(Inst, Insn, Addr, Decoder); +} + +static DecodeStatus DecodeVST2Instruction(MCInst& Inst, unsigned Insn, + uint64_t Addr, const void* Decoder) { + unsigned size = fieldFromInstruction(Insn, 6, 2); + if(size == 3) return MCDisassembler::Fail; + + unsigned type = fieldFromInstruction(Insn, 8, 4); + unsigned align = fieldFromInstruction(Insn, 4, 2); + if(type == 8 && align == 3) return MCDisassembler::Fail; + if(type == 9 && align == 3) return MCDisassembler::Fail; + + return DecodeVSTInstruction(Inst, Insn, Addr, Decoder); +} + +static DecodeStatus DecodeVST3Instruction(MCInst& Inst, unsigned Insn, + uint64_t Addr, const void* Decoder) { + unsigned size = fieldFromInstruction(Insn, 6, 2); + if(size == 3) return MCDisassembler::Fail; + + unsigned align = fieldFromInstruction(Insn, 4, 2); + if(align & 2) return MCDisassembler::Fail; + + return DecodeVSTInstruction(Inst, Insn, Addr, Decoder); +} + +static DecodeStatus DecodeVST4Instruction(MCInst& Inst, unsigned Insn, + uint64_t Addr, const void* Decoder) { + unsigned size = fieldFromInstruction(Insn, 6, 2); + if(size == 3) return MCDisassembler::Fail; + + return DecodeVSTInstruction(Inst, Insn, Addr, Decoder); +} + static DecodeStatus DecodeVSTInstruction(MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) { DecodeStatus S = MCDisassembler::Success; |