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| author | Karl-Johan Karlsson <karl-johan.karlsson@ericsson.com> | 2024-10-16 13:49:34 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-16 13:49:34 +0200 |
| commit | f113a66c29b17e4937ff5d0ab67dc087fa6ee27e (patch) | |
| tree | eaf72c0922ec3410b538359926200a130a5ada5c /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | f3e804b9fd561c0da970536643e2a5cd6c3d4215 (diff) | |
| download | llvm-f113a66c29b17e4937ff5d0ab67dc087fa6ee27e.zip llvm-f113a66c29b17e4937ff5d0ab67dc087fa6ee27e.tar.gz llvm-f113a66c29b17e4937ff5d0ab67dc087fa6ee27e.tar.bz2 | |
[ARM] Fix warnings in ARMAsmParser.cpp and ARMDisassembler.cpp (#112507)
Fix gcc warnings like:
ARMAsmParser.cpp:7168:46: warning: enumeral and non-enumeral type in
conditional expression [-Wextra]
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 93b7490..fa5dd10 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -894,12 +894,13 @@ void ARMDisassembler::AddThumb1SBit(MCInst &MI, bool InITBlock) const { MCID.operands()[i].RegClass == ARM::CCRRegClassID) { if (i > 0 && MCID.operands()[i - 1].isPredicate()) continue; - MI.insert(I, MCOperand::createReg(InITBlock ? 0 : ARM::CPSR)); + MI.insert(I, + MCOperand::createReg(InITBlock ? ARM::NoRegister : ARM::CPSR)); return; } } - MI.insert(I, MCOperand::createReg(InITBlock ? 0 : ARM::CPSR)); + MI.insert(I, MCOperand::createReg(InITBlock ? ARM::NoRegister : ARM::CPSR)); } bool ARMDisassembler::isVectorPredicable(const MCInst &MI) const { |