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author | Fangrui Song <i@maskray.me> | 2022-08-08 11:24:15 -0700 |
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committer | Fangrui Song <i@maskray.me> | 2022-08-08 11:24:15 -0700 |
commit | de9d80c1c579e39cc658a508f1d4ba1cd792e4d5 (patch) | |
tree | 169da231cb69f41d33d52469716f5bc337f17465 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | 09db7f533174cdda4655d0114cd88bd22d336e31 (diff) | |
download | llvm-de9d80c1c579e39cc658a508f1d4ba1cd792e4d5.zip llvm-de9d80c1c579e39cc658a508f1d4ba1cd792e4d5.tar.gz llvm-de9d80c1c579e39cc658a508f1d4ba1cd792e4d5.tar.bz2 |
[llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
With C++17 there is no Clang pedantic warning or MSVC C5051.
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index f15cbb7..8169be4 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -2010,7 +2010,7 @@ static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, case ARM::STC_POST: case ARM::STCL_POST: imm |= U << 8; - LLVM_FALLTHROUGH; + [[fallthrough]]; default: // The 'option' variant doesn't encode 'U' in the immediate since // the immediate is unsigned [0,255]. @@ -3193,7 +3193,7 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, break; } // Fall through to handle the register offset variant. - LLVM_FALLTHROUGH; + [[fallthrough]]; case ARM::VLD1d8wb_fixed: case ARM::VLD1d16wb_fixed: case ARM::VLD1d32wb_fixed: @@ -5015,7 +5015,7 @@ static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, uint64_t Address, case 0x93: // faultmask_ns if (!(FeatureBits[ARM::HasV8MMainlineOps])) return MCDisassembler::Fail; - LLVM_FALLTHROUGH; + [[fallthrough]]; case 10: // msplim case 11: // psplim case 0x88: // msp_ns @@ -6345,7 +6345,7 @@ static DecodeStatus DecodeLOLoop(MCInst &Inst, unsigned Insn, uint64_t Address, case ARM::MVE_LETP: Inst.addOperand(MCOperand::createReg(ARM::LR)); Inst.addOperand(MCOperand::createReg(ARM::LR)); - LLVM_FALLTHROUGH; + [[fallthrough]]; case ARM::t2LE: if (!Check(S, DecodeBFLabelOperand<false, true, true, 11>( Inst, Imm, Address, Decoder))) |