diff options
author | Sander de Smalen <sander.desmalen@arm.com> | 2019-06-11 08:22:10 +0000 |
---|---|---|
committer | Sander de Smalen <sander.desmalen@arm.com> | 2019-06-11 08:22:10 +0000 |
commit | cbeb563cfb1752044fb8771586ae9bbd89d2a07b (patch) | |
tree | dd9dec7d2ce2d7f949c97d9624df5ea1bbbf551d /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | e2acbeb94cf28cf6a8c82e09073df79aa1e846be (diff) | |
download | llvm-cbeb563cfb1752044fb8771586ae9bbd89d2a07b.zip llvm-cbeb563cfb1752044fb8771586ae9bbd89d2a07b.tar.gz llvm-cbeb563cfb1752044fb8771586ae9bbd89d2a07b.tar.bz2 |
Change semantics of fadd/fmul vector reductions.
This patch changes how LLVM handles the accumulator/start value
in the reduction, by never ignoring it regardless of the presence of
fast-math flags on callsites. This change introduces the following
new intrinsics to replace the existing ones:
llvm.experimental.vector.reduce.fadd -> llvm.experimental.vector.reduce.v2.fadd
llvm.experimental.vector.reduce.fmul -> llvm.experimental.vector.reduce.v2.fmul
and adds functionality to auto-upgrade existing LLVM IR and bitcode.
Reviewers: RKSimon, greened, dmgreen, nikic, simoll, aemerson
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D60261
llvm-svn: 363035
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions