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| author | Lucas Prates <lucas.prates@arm.com> | 2022-12-20 17:19:30 +0000 |
|---|---|---|
| committer | Lucas Prates <lucas.prates@arm.com> | 2023-01-23 11:30:49 +0000 |
| commit | b94b8f1e77d9c41d479108c2e0bc14b09275af40 (patch) | |
| tree | 0c9c4b592c60589bc40235186491f499bf066b72 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 3770b4aa3c5a06efbf43b5c22b2b641794a41dca (diff) | |
| download | llvm-b94b8f1e77d9c41d479108c2e0bc14b09275af40.zip llvm-b94b8f1e77d9c41d479108c2e0bc14b09275af40.tar.gz llvm-b94b8f1e77d9c41d479108c2e0bc14b09275af40.tar.bz2 | |
[AArch64] Make CNTPCTSS_EL0 and CNTVCTSS_EL0 system registers read-only
The `CNTPCTSS_EL0` and `CNTVCTSS_EL0` system registers, part of
Armv8.6-A's Enhanced Counter Virtualization extension (FEAT_ECV), are
described as read-only in the Arm ARM. This updates their implementation
to match the spec.
Original patch by Simon Tatham.
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D141398
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions