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| author | Tim Northover <tnorthover@apple.com> | 2014-03-28 12:31:39 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-28 12:31:39 +0000 |
| commit | aa3cf1e6918aad608e8b8eccb1f039ea8958e124 (patch) | |
| tree | 9d8517c0722af3ef8adc9edca7df4a5406ccf9b5 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 163ee4efb529147c53ddc12ac69ec8448d9a3cc8 (diff) | |
| download | llvm-aa3cf1e6918aad608e8b8eccb1f039ea8958e124.zip llvm-aa3cf1e6918aad608e8b8eccb1f039ea8958e124.tar.gz llvm-aa3cf1e6918aad608e8b8eccb1f039ea8958e124.tar.bz2 | |
Intrinsics: expand semantics of LLVMExtendedVectorType (& trunc)
These are used in the ARM backends to aid type-checking on patterns involving
intrinsics. By making sure one argument is an extended/truncated version of
another.
However, there's no reason to limit them to just vectors types. For example
AArch64 has the instruction "uqshrn sD, dN, #imm" which would naturally use an
intrinsic taking an i64 and returning an i32.
llvm-svn: 205003
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions