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| author | Cullen Rhodes <cullen.rhodes@arm.com> | 2022-08-08 08:20:36 +0000 |
|---|---|---|
| committer | Cullen Rhodes <cullen.rhodes@arm.com> | 2022-08-08 08:44:13 +0000 |
| commit | a6dec9f5b2840b77dcf3c1731a68428893501ade (patch) | |
| tree | 487529f1b0d17ade7d4d518b439a6ba8d5a1028b /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 17ac26a78eaa1cbc8543c97f18d37c2e0c8bfad3 (diff) | |
| download | llvm-a6dec9f5b2840b77dcf3c1731a68428893501ade.zip llvm-a6dec9f5b2840b77dcf3c1731a68428893501ade.tar.gz llvm-a6dec9f5b2840b77dcf3c1731a68428893501ade.tar.bz2 | |
[AArch64][SVE] Add patterns to select masked FP arith
Add patterns to select predicated instructions when lowering:
fadd(a, select(mask, b, splat(0)))
fsub(a, select(mask, b, splat(0)))
'fadd' is unsafe unless no-signed zeros fast-math flag is set, since
-0.0 + 0.0 = 0.0
changes the sign. Alive2: https://alive2.llvm.org/ce/z/wbhJh_
Also adds FMA patterns for:
fadd(a, select(mask, mul(b, c), splat(0))) -> fmla(a, mask, b, c)
fsub(a, select(mask, mul(b, c), splat(0))) -> fmla(a, mask, b, c)
These patterns require the 'contract' fast-math flag to be set, and the
fadd 'nsz' as above.
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D130564
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions