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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-08-11 23:08:22 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-08-11 23:08:22 +0000 |
| commit | 9c473e46f3846c8678d1d79911a8eb40e1c55bda (patch) | |
| tree | 0136c2a2d77b4ad45b46f56e4cb0791465aab119 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | cacb0e2d458187fbcf31ee95df9552df9d437955 (diff) | |
| download | llvm-9c473e46f3846c8678d1d79911a8eb40e1c55bda.zip llvm-9c473e46f3846c8678d1d79911a8eb40e1c55bda.tar.gz llvm-9c473e46f3846c8678d1d79911a8eb40e1c55bda.tar.bz2 | |
Fix <rdar://problem/8282498> even if it doesn't reproduce on trunk.
When a register is defined by a partial load:
%reg1234:sub_32 = MOV32mr <fi#-1>; GR64:%reg1234
That load cannot be folded into an instruction using the full 64-bit register.
It would become a 64-bit load.
This is related to the recent change to have isLoadFromStackSlot return false on
a sub-register load.
llvm-svn: 110874
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions