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author | Rahul Joshi <rjoshi@nvidia.com> | 2025-08-26 10:57:43 -0700 |
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committer | GitHub <noreply@github.com> | 2025-08-26 10:57:43 -0700 |
commit | 9b3999b1ffd7d6ac976e6f9f7c39f88a5e457e1c (patch) | |
tree | da4eb4d0ec0c9fac8d7babf01097625b30d50fcc /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
parent | 465f2f649a1ff97cf03485bb9ab74d345bd3c988 (diff) | |
download | llvm-9b3999b1ffd7d6ac976e6f9f7c39f88a5e457e1c.zip llvm-9b3999b1ffd7d6ac976e6f9f7c39f88a5e457e1c.tar.gz llvm-9b3999b1ffd7d6ac976e6f9f7c39f88a5e457e1c.tar.bz2 |
[NFC][MC][ARM] Rearrange decode functions in ARM disassembler (#154988)
Move `tryAddingSymbolicOperand` and `tryAddingPcLoadReferenceComment` to
before including the generated disassembler code. This is in preparation
for rearranging the decoder functions to eliminate forward declarations.
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 19fa03c..f7a7a89 100644 --- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -692,6 +692,42 @@ static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn, uint64_t Address, const MCDisassembler *Decoder); +/// tryAddingSymbolicOperand - trys to add a symbolic operand in place of the +/// immediate Value in the MCInst. The immediate Value has had any PC +/// adjustment made by the caller. If the instruction is a branch instruction +/// then isBranch is true, else false. If the getOpInfo() function was set as +/// part of the setupForSymbolicDisassembly() call then that function is called +/// to get any symbolic information at the Address for this instruction. If +/// that returns non-zero then the symbolic information it returns is used to +/// create an MCExpr and that is added as an operand to the MCInst. If +/// getOpInfo() returns zero and isBranch is true then a symbol look up for +/// Value is done and if a symbol is found an MCExpr is created with that, else +/// an MCExpr with Value is created. This function returns true if it adds an +/// operand to the MCInst and false otherwise. +static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value, + bool isBranch, uint64_t InstSize, + MCInst &MI, + const MCDisassembler *Decoder) { + // FIXME: Does it make sense for value to be negative? + return Decoder->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address, + isBranch, /*Offset=*/0, /*OpSize=*/0, + InstSize); +} + +/// tryAddingPcLoadReferenceComment - trys to add a comment as to what is being +/// referenced by a load instruction with the base register that is the Pc. +/// These can often be values in a literal pool near the Address of the +/// instruction. The Address of the instruction and its immediate Value are +/// used as a possible literal pool entry. The SymbolLookUp call back will +/// return the name of a symbol referenced by the literal pool's entry if +/// the referenced address is that of a symbol. Or it will return a pointer to +/// a literal 'C' string if the referenced address of the literal pool's entry +/// is an address into a section with 'C' string literals. +static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value, + const MCDisassembler *Decoder) { + Decoder->tryAddingPcLoadReferenceComment(Value, Address); +} + #include "ARMGenDisassemblerTables.inc" static MCDisassembler *createARMDisassembler(const Target &T, @@ -832,42 +868,6 @@ DecodeStatus ARMDisassembler::getARMInstruction(MCInst &MI, uint64_t &Size, return MCDisassembler::Fail; } -/// tryAddingSymbolicOperand - trys to add a symbolic operand in place of the -/// immediate Value in the MCInst. The immediate Value has had any PC -/// adjustment made by the caller. If the instruction is a branch instruction -/// then isBranch is true, else false. If the getOpInfo() function was set as -/// part of the setupForSymbolicDisassembly() call then that function is called -/// to get any symbolic information at the Address for this instruction. If -/// that returns non-zero then the symbolic information it returns is used to -/// create an MCExpr and that is added as an operand to the MCInst. If -/// getOpInfo() returns zero and isBranch is true then a symbol look up for -/// Value is done and if a symbol is found an MCExpr is created with that, else -/// an MCExpr with Value is created. This function returns true if it adds an -/// operand to the MCInst and false otherwise. -static bool tryAddingSymbolicOperand(uint64_t Address, int32_t Value, - bool isBranch, uint64_t InstSize, - MCInst &MI, - const MCDisassembler *Decoder) { - // FIXME: Does it make sense for value to be negative? - return Decoder->tryAddingSymbolicOperand(MI, (uint32_t)Value, Address, - isBranch, /*Offset=*/0, /*OpSize=*/0, - InstSize); -} - -/// tryAddingPcLoadReferenceComment - trys to add a comment as to what is being -/// referenced by a load instruction with the base register that is the Pc. -/// These can often be values in a literal pool near the Address of the -/// instruction. The Address of the instruction and its immediate Value are -/// used as a possible literal pool entry. The SymbolLookUp call back will -/// return the name of a symbol referenced by the literal pool's entry if -/// the referenced address is that of a symbol. Or it will return a pointer to -/// a literal 'C' string if the referenced address of the literal pool's entry -/// is an address into a section with 'C' string literals. -static void tryAddingPcLoadReferenceComment(uint64_t Address, int Value, - const MCDisassembler *Decoder) { - Decoder->tryAddingPcLoadReferenceComment(Value, Address); -} - // Thumb1 instructions don't have explicit S bits. Rather, they // implicitly set CPSR. Since it's not represented in the encoding, the // auto-generated decoder won't inject the CPSR operand. We need to fix |