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| author | moorabbit <moorabbit@proton.me> | 2025-09-04 08:50:06 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-04 12:50:06 +0000 |
| commit | 8bdd9090d0c75226b47232380d96051ff173b067 (patch) | |
| tree | 9a120733ef43bdff2a4a7aa1fe18bd4b6fbddfd6 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | 209d91d9e4c43966a908646a1b4ab2526bfc899d (diff) | |
| download | llvm-8bdd9090d0c75226b47232380d96051ff173b067.zip llvm-8bdd9090d0c75226b47232380d96051ff173b067.tar.gz llvm-8bdd9090d0c75226b47232380d96051ff173b067.tar.bz2 | |
[Headers][X86] Add constexpr support for some AVX[512] intrinsics. (#156567)
The following AVX[512] intrinsics are now constexpr:
- `_mm_mask_cvtepi32_pd`
- `_mm_maskz_cvtepi32_pd`
- `_mm_mask_cvtepi32_ps`
- `_mm_maskz_cvtepi32_ps`
- `_mm_cvtepu32_pd`
- `_mm_mask_cvtepu32_pd`
- `_mm_maskz_cvtepu32_pd`
- `_mm_cvtepu32_ps`
- `_mm_mask_cvtepu32_ps`
- `_mm_maskz_cvtepu32_ps`
- `_mm256_mask_cvtepi32_pd`
- `_mm256_maskz_cvtepi32_pd`
- `_mm256_mask_cvtepi32_ps`
- `_mm256_maskz_cvtepi32_ps`
- `_mm256_cvtepu32_pd`
- `_mm256_mask_cvtepu32_pd`
- `_mm256_maskz_cvtepu32_pd`
- `_mm256_cvtepu32_ps`
- `_mm256_mask_cvtepu32_ps`
- `_mm256_maskz_cvtepu32_ps`
- `_mm512_cvtepi64_pd`
- `_mm512_mask_cvtepi64_pd`
- `_mm512_maskz_cvtepi64_pd`
- `_mm512_cvtepu64_pd`
- `_mm512_mask_cvtepu64_pd`
- `_mm512_maskz_cvtepu64_pd`
This PR is part 2 [[part
1](https://github.com/llvm/llvm-project/pull/156187)] of a series of PRs
fixing #155798
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions