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authorNicolai Haehnle <nhaehnle@gmail.com>2019-04-23 13:12:52 +0000
committerNicolai Haehnle <nhaehnle@gmail.com>2019-04-23 13:12:52 +0000
commit7edae4c403871a8e97878b8424f5a8f62905357b (patch)
treec5d678595b8c0d37fad553e7eb622fec93e5cf14 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
parent652168a99b5cdc1fb420b1224c8c2d42ad2b7465 (diff)
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AMDGPU: Fix LCSSA phi lowering in SILowerI1Copies
Summary: When an LCSSA phi survives through instruction selection, the pass ends up removing that phi entirely because it is dominated by the logic that does the lanemask merging. This then used to trigger an assertion when processing a dependent phi instruction. Change-Id: Id4949719f8298062fe476a25718acccc109113b6 Reviewers: llvm-commits Subscribers: kzhuravl, jvesely, wdng, yaxunl, t-tye, tpr, dstuttard, rtaylor, arsenm Tags: #llvm Differential Revision: https://reviews.llvm.org/D60999 llvm-svn: 358983
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
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