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| author | Sudharsan Veeravalli <quic_svs@quicinc.com> | 2025-11-10 09:48:56 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-11-10 09:48:56 +0530 |
| commit | 4d88bb6c6303d9f3894803d3c34d87bbc3e9a611 (patch) | |
| tree | be897f5fdef04c11dda8ece5f72a5e47307e7a55 /llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | cf1f871023e432837581b84c8563f3b0690dd9d3 (diff) | |
| download | llvm-4d88bb6c6303d9f3894803d3c34d87bbc3e9a611.zip llvm-4d88bb6c6303d9f3894803d3c34d87bbc3e9a611.tar.gz llvm-4d88bb6c6303d9f3894803d3c34d87bbc3e9a611.tar.bz2 | |
[Hexagon] Implement isMaskAndCmp0FoldingBeneficial (#166891)
Sink `and` mask to `cmp` use block if it is masking a single bit since
this will fold the `and/cmp/br` into a single `tstbit` instruction.
Diffstat (limited to 'llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions