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| author | Oliver Stannard <oliver.stannard@arm.com> | 2015-12-16 12:37:39 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2015-12-16 12:37:39 +0000 |
| commit | 2de8c1691304420d2f1050f31c9f25e043ab7874 (patch) | |
| tree | 64bfdc49f345b7df8a2890fd573b528bcb58db67 /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | 25e241b006559ec6cb188ac32fb7fba0f358bc1b (diff) | |
| download | llvm-2de8c1691304420d2f1050f31c9f25e043ab7874.zip llvm-2de8c1691304420d2f1050f31c9f25e043ab7874.tar.gz llvm-2de8c1691304420d2f1050f31c9f25e043ab7874.tar.bz2 | |
[ARM] Add ARMv8.2-A FP16 vector instructions
ARMv8.2-A adds 16-bit floating point versions of all existing SIMD
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.
Note that VFP without SIMD is not a valid combination for any version of
ARMv8-A, but I have ensured that these instructions all depend on both
FeatureNEON and FeatureFullFP16 for consistency.
Differential Revision: http://reviews.llvm.org/D15039
llvm-svn: 255764
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 72c98f0..8ba36f8 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -5643,9 +5643,11 @@ bool ARMAsmParser::shouldOmitPredicateOperand(StringRef Mnemonic, // VRINT{Z, R, X} have a predicate operand in VFP, but not in NEON unsigned RegIdx = 3; if ((Mnemonic == "vrintz" || Mnemonic == "vrintx" || Mnemonic == "vrintr") && - static_cast<ARMOperand &>(*Operands[2]).getToken() == ".f32") { + (static_cast<ARMOperand &>(*Operands[2]).getToken() == ".f32" || + static_cast<ARMOperand &>(*Operands[2]).getToken() == ".f16")) { if (static_cast<ARMOperand &>(*Operands[3]).isToken() && - static_cast<ARMOperand &>(*Operands[3]).getToken() == ".f32") + (static_cast<ARMOperand &>(*Operands[3]).getToken() == ".f32" || + static_cast<ARMOperand &>(*Operands[3]).getToken() == ".f16")) RegIdx = 4; if (static_cast<ARMOperand &>(*Operands[RegIdx]).isReg() && |