diff options
author | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-06-11 15:34:59 +0000 |
---|---|---|
committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2015-06-11 15:34:59 +0000 |
commit | ed64d62c70414db501f7bdda8dcf0b4fa0dd8bcc (patch) | |
tree | 919a068d98605c84fe33027bd6a662dc938760eb /llvm/lib/Target/ARM/ARMTargetMachine.cpp | |
parent | fd5286717c7be8a632f6ffc954eeda7dbc21d540 (diff) | |
download | llvm-ed64d62c70414db501f7bdda8dcf0b4fa0dd8bcc.zip llvm-ed64d62c70414db501f7bdda8dcf0b4fa0dd8bcc.tar.gz llvm-ed64d62c70414db501f7bdda8dcf0b4fa0dd8bcc.tar.bz2 |
Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.
Reviewers: rengolin
Reviewed By: rengolin
Subscribers: llvm-commits, jfb, rengolin
Differential Revision: http://reviews.llvm.org/D10361
llvm-svn: 239538
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMTargetMachine.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index 04d2b53..a6b56ad 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -115,11 +115,10 @@ computeTargetABI(const Triple &TT, StringRef CPU, return TargetABI; } -static std::string computeDataLayout(StringRef TT, StringRef CPU, +static std::string computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) { - const Triple Triple(TT); - auto ABI = computeTargetABI(Triple, CPU, Options); + auto ABI = computeTargetABI(TT, CPU, Options); std::string Ret = ""; if (isLittle) @@ -129,7 +128,7 @@ static std::string computeDataLayout(StringRef TT, StringRef CPU, // Big endian. Ret += "E"; - Ret += DataLayout::getManglingComponent(Triple); + Ret += DataLayout::getManglingComponent(TT); // Pointers are 32 bits and aligned to 32 bits. Ret += "-p:32:32"; @@ -159,7 +158,7 @@ static std::string computeDataLayout(StringRef TT, StringRef CPU, // The stack is 128 bit aligned on NaCl, 64 bit aligned on AAPCS and 32 bit // aligned everywhere else. - if (Triple.isOSNaCl()) + if (TT.isOSNaCl()) Ret += "-S128"; else if (ABI == ARMBaseTargetMachine::ARM_ABI_AAPCS) Ret += "-S64"; @@ -176,8 +175,9 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) - : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, - CPU, FS, Options, RM, CM, OL), + : LLVMTargetMachine(T, + computeDataLayout(Triple(TT), CPU, Options, isLittle), + TT, CPU, FS, Options, RM, CM, OL), TargetABI(computeTargetABI(Triple(TT), CPU, Options)), TLOF(createTLOF(Triple(getTargetTriple()))), Subtarget(Triple(TT), CPU, FS, *this, isLittle), isLittle(isLittle) { |