aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/ARM/ARMTargetMachine.cpp
diff options
context:
space:
mode:
authorMatthias Braun <matze@braunis.de>2014-12-11 19:42:09 +0000
committerMatthias Braun <matze@braunis.de>2014-12-11 19:42:09 +0000
commit199aeff7dd4b970d41371d6ec5f753b2f5d28576 (patch)
treedf73cf3f3c0d6d5b51f82f373aa9a64721342aaa /llvm/lib/Target/ARM/ARMTargetMachine.cpp
parenta7c82a9f1da9466ca0b5481e6ccb852a0fbba99d (diff)
downloadllvm-199aeff7dd4b970d41371d6ec5f753b2f5d28576.zip
llvm-199aeff7dd4b970d41371d6ec5f753b2f5d28576.tar.gz
llvm-199aeff7dd4b970d41371d6ec5f753b2f5d28576.tar.bz2
Enable machineverifier in debug mode for X86, ARM, AArch64, Mips
llvm-svn: 224043
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp20
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 1af622c..6e198a7 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -243,9 +243,9 @@ bool ARMPassConfig::addInstSelector() {
void ARMPassConfig::addPreRegAlloc() {
if (getOptLevel() != CodeGenOpt::None)
- addPass(createARMLoadStoreOptimizationPass(true), false);
+ addPass(createARMLoadStoreOptimizationPass(true));
if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9())
- addPass(createMLxExpansionPass(), false);
+ addPass(createMLxExpansionPass());
// Since the A15SDOptimizer pass can insert VDUP instructions, it can only be
// enabled when NEON is available.
if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA15() &&
@@ -256,23 +256,23 @@ void ARMPassConfig::addPreRegAlloc() {
void ARMPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None) {
- addPass(createARMLoadStoreOptimizationPass(), false);
+ addPass(createARMLoadStoreOptimizationPass());
if (getARMSubtarget().hasNEON())
- addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass), false);
+ addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
}
// Expand some pseudo instructions into multiple instructions to allow
// proper scheduling.
- addPass(createARMExpandPseudoPass(), false);
+ addPass(createARMExpandPseudoPass());
if (getOptLevel() != CodeGenOpt::None) {
if (!getARMSubtarget().isThumb1Only()) {
// in v8, IfConversion depends on Thumb instruction widths
if (getARMSubtarget().restrictIT() &&
!getARMSubtarget().prefers32BitThumb())
- addPass(createThumb2SizeReductionPass(), false);
- addPass(&IfConverterID, false);
+ addPass(createThumb2SizeReductionPass());
+ addPass(&IfConverterID);
}
}
if (getARMSubtarget().isThumb2())
@@ -282,12 +282,12 @@ void ARMPassConfig::addPreSched2() {
void ARMPassConfig::addPreEmitPass() {
if (getARMSubtarget().isThumb2()) {
if (!getARMSubtarget().prefers32BitThumb())
- addPass(createThumb2SizeReductionPass(), false);
+ addPass(createThumb2SizeReductionPass());
// Constant island pass work on unbundled instructions.
- addPass(&UnpackMachineBundlesID, false);
+ addPass(&UnpackMachineBundlesID);
}
- addPass(createARMOptimizeBarriersPass(), false);
+ addPass(createARMOptimizeBarriersPass());
addPass(createARMConstantIslandPass());
}