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author | Tom Stellard <thomas.stellard@amd.com> | 2014-06-10 16:01:25 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2014-06-10 16:01:25 +0000 |
commit | b9a023383e9dd4ff82e9862c92450d4d1d193464 (patch) | |
tree | 6667d8b62c67857db3ee2f8d37560a49977b7541 /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
parent | 3ca1bfc728b5215ae39054f2db20bfb7f51e9413 (diff) | |
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SelectionDAG: Enable (and (setcc x), (setcc y)) -> (setcc (and x, y)) for vectors
This prevents a future commit from regressing:
test/CodeGen/R600/setcc-equivalent.ll
llvm-svn: 210540
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
0 files changed, 0 insertions, 0 deletions