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| author | Maurice Heumann <MauriceHeumann@gmail.com> | 2023-07-02 12:18:50 -0700 |
|---|---|---|
| committer | Eli Friedman <efriedma@quicinc.com> | 2023-07-02 14:25:25 -0700 |
| commit | 92a9c30c61da7f973d55cd84fade424159b9cac9 (patch) | |
| tree | dccd0711ebc0c9c7eba6d7f52623ab2f633fc5d7 /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | b4bae3fd8ede10026a6f6e1caaec476125f5ac67 (diff) | |
| download | llvm-92a9c30c61da7f973d55cd84fade424159b9cac9.zip llvm-92a9c30c61da7f973d55cd84fade424159b9cac9.tar.gz llvm-92a9c30c61da7f973d55cd84fade424159b9cac9.tar.bz2 | |
[ARM] Adjust strd/ldrd codegen alignment requirements
In change https://reviews.llvm.org/D152790, it was discovered that the
alignment requirement calculation for LDRD/STRD codegen was suboptimal
and the calculation for volatile loads and stores was adjusted.
This change here adopts the calculation for the remaining non-volatile
occurances.
Differential Revision: https://reviews.llvm.org/D153800
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index eb2f6cd..93db983 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -2289,10 +2289,7 @@ bool ARMPreAllocLoadStoreOpt::CanFormLdStDWord( return false; Align Alignment = (*Op0->memoperands_begin())->getAlign(); - const Function &Func = MF->getFunction(); - Align ReqAlign = - STI->hasV6Ops() ? TD->getABITypeAlign(Type::getInt64Ty(Func.getContext())) - : Align(8); // Pre-v6 need 8-byte align + Align ReqAlign = STI->getDualLoadStoreAlignment(); if (Alignment < ReqAlign) return false; |