diff options
| author | Stephan Herhut <herhut@google.com> | 2021-01-11 12:32:25 +0100 |
|---|---|---|
| committer | Stephan Herhut <herhut@google.com> | 2021-01-11 14:27:28 +0100 |
| commit | 2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57 (patch) | |
| tree | 12c770116e091dca9e35e8261338cbae13999c9a /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | 8112a2598ce180ab4cd106f154a71e813fc28d91 (diff) | |
| download | llvm-2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57.zip llvm-2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57.tar.gz llvm-2e17d9c0ee7a0ba2aff7dd449005e4d0fd10fe57.tar.bz2 | |
[ARM] Add uses for locals introduced for debug messages. NFC.
This adds uses for locals introduced for new debug messages for the load store optimizer. Those locals are only used on debug statements and otherwise create unused variable warnings.
Differential Revision: https://reviews.llvm.org/D94398
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index 5144cf9..aa1fe4e 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1511,6 +1511,7 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) { .addReg(MO.getReg(), (isLd ? getDefRegState(true) : getKillRegState(MO.isKill()))) .cloneMemRefs(*MI); + (void)MIB; LLVM_DEBUG(dbgs() << " Added new instruction: " << *MIB); } else if (isLd) { if (isAM2) { @@ -1524,6 +1525,7 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) { .addImm(Pred) .addReg(PredReg) .cloneMemRefs(*MI); + (void)MIB; LLVM_DEBUG(dbgs() << " Added new instruction: " << *MIB); } else { int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); @@ -1535,6 +1537,7 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) { .addImm(Imm) .add(predOps(Pred, PredReg)) .cloneMemRefs(*MI); + (void)MIB; LLVM_DEBUG(dbgs() << " Added new instruction: " << *MIB); } } else { @@ -1546,6 +1549,7 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) { .addImm(Offset) .add(predOps(Pred, PredReg)) .cloneMemRefs(*MI); + (void)MIB; LLVM_DEBUG(dbgs() << " Added new instruction: " << *MIB); } } else { @@ -1563,6 +1567,7 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) { .addImm(Imm) .add(predOps(Pred, PredReg)) .cloneMemRefs(*MI); + (void)MIB; LLVM_DEBUG(dbgs() << " Added new instruction: " << *MIB); } else { // t2STR_PRE, t2STR_POST @@ -1572,6 +1577,7 @@ bool ARMLoadStoreOpt::MergeBaseUpdateLoadStore(MachineInstr *MI) { .addImm(Offset) .add(predOps(Pred, PredReg)) .cloneMemRefs(*MI); + (void)MIB; LLVM_DEBUG(dbgs() << " Added new instruction: " << *MIB); } } |