diff options
| author | Kazu Hirata <kazu@google.com> | 2024-10-10 20:30:04 -0700 |
|---|---|---|
| committer | Kazu Hirata <kazu@google.com> | 2024-10-10 20:30:04 -0700 |
| commit | 126ed16525c92af1025a86b582c087d213b47145 (patch) | |
| tree | 5168e795beb371e6e5f399af2696f8b3aca9f85f /llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | |
| parent | ec3e0a5900894c82e1763aa8597f47111edf6246 (diff) | |
| download | llvm-126ed16525c92af1025a86b582c087d213b47145.zip llvm-126ed16525c92af1025a86b582c087d213b47145.tar.gz llvm-126ed16525c92af1025a86b582c087d213b47145.tar.bz2 | |
[ARM] Fix formatting (NFC)
I'm about to post a PR in this area.
Diffstat (limited to 'llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index b042ee6..b151a011 100644 --- a/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -2531,7 +2531,7 @@ bool ARMPreAllocLoadStoreOpt::RescheduleLoadStoreInstrs(MachineBasicBlock *MBB) { bool RetVal = false; - DenseMap<MachineInstr*, unsigned> MI2LocMap; + DenseMap<MachineInstr *, unsigned> MI2LocMap; using MapIt = DenseMap<unsigned, SmallVector<MachineInstr *, 4>>::iterator; using Base2InstMap = DenseMap<unsigned, SmallVector<MachineInstr *, 4>>; using BaseVec = SmallVector<unsigned, 4>; @@ -2570,7 +2570,7 @@ ARMPreAllocLoadStoreOpt::RescheduleLoadStoreInstrs(MachineBasicBlock *MBB) { Register Base = MI.getOperand(1).getReg(); int Offset = getMemoryOpOffset(MI); bool StopHere = false; - auto FindBases = [&] (Base2InstMap &Base2Ops, BaseVec &Bases) { + auto FindBases = [&](Base2InstMap &Base2Ops, BaseVec &Bases) { MapIt BI = Base2Ops.find(Base); if (BI == Base2Ops.end()) { Base2Ops[Base].push_back(&MI); |