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author | Evan Cheng <evan.cheng@apple.com> | 2011-12-14 02:11:42 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2011-12-14 02:11:42 +0000 |
commit | 7fae11b23181d048417a521aa8adaaec318a91c0 (patch) | |
tree | f3d795816e99278225610b799cbc7f95da8f477d /llvm/lib/Target/ARM/ARMHazardRecognizer.cpp | |
parent | 87ebe63542e980e332ba4c61ad6d78654ae4c90a (diff) | |
download | llvm-7fae11b23181d048417a521aa8adaaec318a91c0.zip llvm-7fae11b23181d048417a521aa8adaaec318a91c0.tar.gz llvm-7fae11b23181d048417a521aa8adaaec318a91c0.tar.bz2 |
- Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
prevent IT blocks from being broken apart.
llvm-svn: 146542
Diffstat (limited to 'llvm/lib/Target/ARM/ARMHazardRecognizer.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMHazardRecognizer.cpp | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp b/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp index 2393544..a5fd15b 100644 --- a/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp +++ b/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp @@ -38,9 +38,6 @@ ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { MachineInstr *MI = SU->getInstr(); if (!MI->isDebugValue()) { - if (ITBlockSize && MI != ITBlockMIs[ITBlockSize-1]) - return Hazard; - // Look for special VMLA / VMLS hazards. A VMUL / VADD / VSUB following // a VMLA / VMLS will cause 4 cycle stall. const MCInstrDesc &MCID = MI->getDesc(); @@ -76,30 +73,11 @@ ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { void ARMHazardRecognizer::Reset() { LastMI = 0; FpMLxStalls = 0; - ITBlockSize = 0; ScoreboardHazardRecognizer::Reset(); } void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { MachineInstr *MI = SU->getInstr(); - unsigned Opcode = MI->getOpcode(); - if (ITBlockSize) { - --ITBlockSize; - } else if (Opcode == ARM::t2IT) { - unsigned Mask = MI->getOperand(1).getImm(); - unsigned NumTZ = CountTrailingZeros_32(Mask); - assert(NumTZ <= 3 && "Invalid IT mask!"); - ITBlockSize = 4 - NumTZ; - MachineBasicBlock::iterator I = MI; - for (unsigned i = 0; i < ITBlockSize; ++i) { - // Advance to the next instruction, skipping any dbg_value instructions. - do { - ++I; - } while (I->isDebugValue()); - ITBlockMIs[ITBlockSize-1-i] = &*I; - } - } - if (!MI->isDebugValue()) { LastMI = MI; FpMLxStalls = 0; |