diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2025-09-12 19:22:02 +0900 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-12 19:22:02 +0900 |
| commit | 7289f2cd0c371b2539faa628ec0eea58fa61892c (patch) | |
| tree | d5b7335a9d5f0f6dfceaf6791f4f0bcadca02142 /llvm/lib/Target/ARM/ARMFrameLowering.cpp | |
| parent | 83b48b13f3a70bf56053e92593270c519859cfd7 (diff) | |
| download | llvm-7289f2cd0c371b2539faa628ec0eea58fa61892c.zip llvm-7289f2cd0c371b2539faa628ec0eea58fa61892c.tar.gz llvm-7289f2cd0c371b2539faa628ec0eea58fa61892c.tar.bz2 | |
CodeGen: Remove MachineFunction argument from getRegClass (#158188)
This is a low level utility to parse the MCInstrInfo and should
not depend on the state of the function.
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFrameLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index a8da70e..138981a 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -2364,7 +2364,7 @@ static unsigned estimateRSStackSizeLimit(MachineFunction &MF, break; const MCInstrDesc &MCID = MI.getDesc(); - const TargetRegisterClass *RegClass = TII.getRegClass(MCID, i, TRI, MF); + const TargetRegisterClass *RegClass = TII.getRegClass(MCID, i, TRI); if (RegClass && !RegClass->contains(ARM::SP)) HasNonSPFrameIndex = true; |