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| author | Simon Dardis <simon.dardis@mips.com> | 2018-05-14 10:53:15 +0000 |
|---|---|---|
| committer | Simon Dardis <simon.dardis@mips.com> | 2018-05-14 10:53:15 +0000 |
| commit | fba03620968065984d5eb183de55b83a8ce21c4c (patch) | |
| tree | 276f81bd1d3c5df154fcf42b02bf1030467eb8c3 /llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp | |
| parent | a907ba4cb84ada5dde44e5bae769cbe733d2c937 (diff) | |
| download | llvm-fba03620968065984d5eb183de55b83a8ce21c4c.zip llvm-fba03620968065984d5eb183de55b83a8ce21c4c.tar.gz llvm-fba03620968065984d5eb183de55b83a8ce21c4c.tar.bz2 | |
[mips] Correct the predicates of indexed floating point stores and loads.
Also, fix the register class for microMIPS.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46689
llvm-svn: 332227
Diffstat (limited to 'llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp')
0 files changed, 0 insertions, 0 deletions