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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2021-11-23 19:47:40 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-02-02 19:05:05 -0500 |
| commit | d6fdbbcace0b51c0096c5dbab6afb6449da21524 (patch) | |
| tree | f37236451f690227613a68503824b5e7cfac048e /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | |
| parent | 85628ce75b3084dc0f185a320152baf85b59aba7 (diff) | |
| download | llvm-d6fdbbcace0b51c0096c5dbab6afb6449da21524.zip llvm-d6fdbbcace0b51c0096c5dbab6afb6449da21524.tar.gz llvm-d6fdbbcace0b51c0096c5dbab6afb6449da21524.tar.bz2 | |
AMDGPU: Add second emergency slot for SGPR to vmem for large frames
In a future change, we will sometimes use a VGPR offset for doing
spills to memory, in which case we need 2 free VGPRs to do the SGPR
spill. In most cases we could spill the VGPR along with the SGPR being
spilled, but we don't have any free lanes for SGPR_1024 in wave32 so
we could still potentially need a second scavenging slot.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h index 8e82127..6114a13 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h @@ -555,7 +555,11 @@ public: unsigned NumLane) const; bool allocateSGPRSpillToVGPR(MachineFunction &MF, int FI); bool allocateVGPRSpillToAGPR(MachineFunction &MF, int FI, bool isAGPRtoVGPR); - void removeDeadFrameIndices(MachineFrameInfo &MFI); + + /// If \p ResetSGPRSpillStackIDs is true, reset the stack ID from sgpr-spill + /// to the default stack. + bool removeDeadFrameIndices(MachineFrameInfo &MFI, + bool ResetSGPRSpillStackIDs); int getScavengeFI(MachineFrameInfo &MFI, const SIRegisterInfo &TRI); Optional<int> getOptionalScavengeFI() const { return ScavengeFI; } |