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| author | Jay Foad <jay.foad@amd.com> | 2024-07-17 10:18:03 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-17 10:18:03 +0100 |
| commit | c7309dadbf5a07353fa18a712895e3cfb48a78e7 (patch) | |
| tree | 7e13b0cd4e708d14d4e87612bc28cd293a831334 /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | 2e56497bf7b2c848b2c43ce8c64e585bc006240a (diff) | |
| download | llvm-c7309dadbf5a07353fa18a712895e3cfb48a78e7.zip llvm-c7309dadbf5a07353fa18a712895e3cfb48a78e7.tar.gz llvm-c7309dadbf5a07353fa18a712895e3cfb48a78e7.tar.bz2 | |
[AMDGPU] Use range-based for loops. NFC. (#99047)
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index 5e89c28..2186c1e 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -324,8 +324,7 @@ void SIMachineFunctionInfo::shiftSpillPhysVGPRsToLowestRange( MachineFunction &MF) { const SIRegisterInfo *TRI = MF.getSubtarget<GCNSubtarget>().getRegisterInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); - for (unsigned I = 0, E = SpillPhysVGPRs.size(); I < E; ++I) { - Register Reg = SpillPhysVGPRs[I]; + for (Register &Reg : SpillPhysVGPRs) { Register NewReg = TRI->findUnusedRegister(MRI, &AMDGPU::VGPR_32RegClass, MF); if (!NewReg || NewReg >= Reg) @@ -334,7 +333,6 @@ void SIMachineFunctionInfo::shiftSpillPhysVGPRsToLowestRange( MRI.replaceRegWith(Reg, NewReg); // Update various tables with the new VGPR. - SpillPhysVGPRs[I] = NewReg; WWMReservedRegs.remove(Reg); WWMReservedRegs.insert(NewReg); WWMSpills.insert(std::make_pair(NewReg, WWMSpills[Reg])); @@ -344,6 +342,8 @@ void SIMachineFunctionInfo::shiftSpillPhysVGPRsToLowestRange( MBB.removeLiveIn(Reg); MBB.sortUniqueLiveIns(); } + + Reg = NewReg; } } |