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| author | Akshat Oke <Akshat.Oke@amd.com> | 2024-11-05 13:17:25 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-05 13:17:25 +0530 |
| commit | 3495d0456021618be73de1ed0a3aa97952513ffc (patch) | |
| tree | 40e0a32314f33c03a46a212ac162c0003acf938b /llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | |
| parent | 70de0b8bea31bb734bce86581574a60a0968d838 (diff) | |
| download | llvm-3495d0456021618be73de1ed0a3aa97952513ffc.zip llvm-3495d0456021618be73de1ed0a3aa97952513ffc.tar.gz llvm-3495d0456021618be73de1ed0a3aa97952513ffc.tar.bz2 | |
[AMDGPU][MIR] Serialize SpillPhysVGPRs (#113129)
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp index e59dd72..1e43d27 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp @@ -711,6 +711,9 @@ yaml::SIMachineFunctionInfo::SIMachineFunctionInfo( PSInputAddr(MFI.getPSInputAddr()), PSInputEnable(MFI.getPSInputEnable()), Mode(MFI.getMode()) { + for (Register Reg : MFI.getSGPRSpillPhysVGPRs()) + SpillPhysVGPRS.push_back(regToString(Reg, TRI)); + for (Register Reg : MFI.getWWMReservedRegs()) WWMReservedRegs.push_back(regToString(Reg, TRI)); |