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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2025-07-21 15:41:24 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-21 15:41:24 -0700 |
| commit | 97a66a897caeb1445160d1862fd5b35bb5416ffb (patch) | |
| tree | 51716aaec470ff50db2b36ebafe3c4dfa303a1ce /llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | |
| parent | 8f26a301bc7caf3d11d1f03818dae77a24e266e9 (diff) | |
| download | llvm-97a66a897caeb1445160d1862fd5b35bb5416ffb.zip llvm-97a66a897caeb1445160d1862fd5b35bb5416ffb.tar.gz llvm-97a66a897caeb1445160d1862fd5b35bb5416ffb.tar.bz2 | |
[AMDGPU] Prohibit load/store merge if scale_offset is set on gfx1250 (#149895)
Scaling is done on the operation size, by merging instructions we
would need to generate code to scale the offset and reset the
auto-scale bit. This is unclear if that would be beneficial, just
disable such merge for now.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp index 5097ac03..b49c5a9 100644 --- a/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp +++ b/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp @@ -61,6 +61,7 @@ #include "AMDGPU.h" #include "GCNSubtarget.h" #include "MCTargetDesc/AMDGPUMCTargetDesc.h" +#include "SIDefines.h" #include "llvm/Analysis/AliasAnalysis.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/InitializePasses.h" @@ -1078,7 +1079,9 @@ bool SILoadStoreOptimizer::offsetsCanBeCombined(CombineInfo &CI, if (EltOffset0 + CI.Width != EltOffset1 && EltOffset1 + Paired.Width != EltOffset0) return false; - if (CI.CPol != Paired.CPol) + // Instructions with scale_offset modifier cannot be combined unless we + // also generate a code to scale the offset and reset that bit. + if (CI.CPol != Paired.CPol || (CI.CPol & AMDGPU::CPol::SCAL)) return false; if (CI.InstClass == S_LOAD_IMM || CI.InstClass == S_BUFFER_LOAD_IMM || CI.InstClass == S_BUFFER_LOAD_SGPR_IMM) { |