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| author | chuongg3 <chuong.goh@arm.com> | 2023-12-15 10:46:57 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-12-15 10:46:57 +0000 |
| commit | 70579c95bd12cb3035178f80a65718fd94cbf2ea (patch) | |
| tree | a1406fe7bf3f6144562ae656aa6a76dfcc179743 /llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | |
| parent | cb1a7d28e608a107d001e11e0e0baa8b4fea97b5 (diff) | |
| download | llvm-70579c95bd12cb3035178f80a65718fd94cbf2ea.zip llvm-70579c95bd12cb3035178f80a65718fd94cbf2ea.tar.gz llvm-70579c95bd12cb3035178f80a65718fd94cbf2ea.tar.bz2 | |
[AArch64][GlobalISel] Look into array's element (#74109)
In AArch64RegisterBankInfo, IsFPOrFPType() does not work correctly
with ArrayTypes and StructTypes as it does not not look at their
elements.
This caused some registers to be selected as gpr instead of fpr.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp')
0 files changed, 0 insertions, 0 deletions