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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-10-01 22:40:35 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-10-01 22:40:35 +0000 |
| commit | b733f00510e9ea1e737b4efd88516fc47c90e4f1 (patch) | |
| tree | 62a13a0bf83e5bf56ad1a2c472d9e7fa49c86569 /llvm/lib/Target/AMDGPU/SIInsertWaits.cpp | |
| parent | 2648702e9238e28184e78e1db83795617bac2ba8 (diff) | |
| download | llvm-b733f00510e9ea1e737b4efd88516fc47c90e4f1.zip llvm-b733f00510e9ea1e737b4efd88516fc47c90e4f1.tar.gz llvm-b733f00510e9ea1e737b4efd88516fc47c90e4f1.tar.bz2 | |
AMDGPU: Fix unused variable warning in release build
llvm-svn: 249091
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIInsertWaits.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInsertWaits.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp index e0cf84a..eeb79ee 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp @@ -158,8 +158,8 @@ Counters SIInsertWaits::getHwCounts(MachineInstr &MI) { if (TII->isSMRD(MI.getOpcode())) { if (MI.getNumOperands() != 0) { - MachineOperand &Op = MI.getOperand(0); - assert(Op.isReg() && "First LGKM operand must be a register!"); + assert(MI.getOperand(0).isReg() && + "First LGKM operand must be a register!"); // XXX - What if this is a write into a super register? const TargetRegisterClass *RC = TII->getOpRegClass(MI, 0); |