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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-06-24 06:30:11 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-06-24 06:30:11 +0000 |
commit | 43e92fe306ac1fa4fb36062a458a18a9aed23855 (patch) | |
tree | 275b08407e8fb1478bd185b851b497c43fbe0877 /llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | |
parent | f11b9798f4cd1d3dbcae7e0003d79c7b428b4d04 (diff) | |
download | llvm-43e92fe306ac1fa4fb36062a458a18a9aed23855.zip llvm-43e92fe306ac1fa4fb36062a458a18a9aed23855.tar.gz llvm-43e92fe306ac1fa4fb36062a458a18a9aed23855.tar.bz2 |
AMDGPU: Cleanup subtarget handling.
Split AMDGPUSubtarget into amdgcn/r600 specific subclasses.
This removes most of the static_casting of the basic codegen
classes everywhere, and tries to restrict the features
visible on the wrong target.
llvm-svn: 273652
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFoldOperands.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp index 236a3f1..4ba9d73 100644 --- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp +++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp @@ -16,8 +16,6 @@ #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/IR/Function.h" -#include "llvm/IR/LLVMContext.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetMachine.h" @@ -298,9 +296,10 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) { if (skipFunction(*MF.getFunction())) return false; + const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); + MachineRegisterInfo &MRI = MF.getRegInfo(); - const SIInstrInfo *TII = - static_cast<const SIInstrInfo *>(MF.getSubtarget().getInstrInfo()); + const SIInstrInfo *TII = ST.getInstrInfo(); const SIRegisterInfo &TRI = TII->getRegisterInfo(); for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); |